Dr. Thomas W. Barr is a science advisor at Irell & Manella LLP, where he specializes in technical advising for patent litigation and runs Irell's in-house Technical Analysis Laboratory. He has experience advising on various technologies, including computer architecture, integrated circuit design and fabrication, telecommunications, medical and embedded devices, and operating systems/security.

Prior to joining Irell, Thomas was a research assistant at Rice University. His research has focused on computer architecture and operating systems, specifically in the areas of high-performance computing, memory systems, robotics, and embedded systems. Thomas was the original maintainer of embeddedpython.org, an open-source Python environment for microcontrollers. He is an active member of the Association for Computer Machinery and a senior member of the Institute of Electrical and Electronics Engineers.

Thomas earned his Ph.D. in Computer Science and his M.S. in Electrical and Computer Engineering from Rice University. He earned his B.S. in Engineering and Music, with distinction, from Harvey Mudd College.

Experience

  • Netlist Inc. v. Samsung Electronics Co. (E.D. Tex.). Served as the science advisor for the team that secured a $303.15 million jury verdict for Netlist in a suit against Samsung involving five patents relating to computer memory technology. The jury also found willful infringement, and determined Samsung failed to prove any of the patents are invalid.
  • VLSI Technology LLC v. Intel Corporation (W.D. Tex.). Served as the science advisor for the team that secured a $948 million jury award plus running royalties for VLSI Technology in a suit against Intel involving a microprocessor technology patent. The Austin, Texas jury found that Intel infringed the asserted claims in the patent and that Intel had not shown the patent was invalid. The award follows a $2.3 billion final judgment VLSI obtained in a separate suit against Intel, for which Thomas was also science advisor for the trial team.
  • VLSI Technology LLC v. Intel Corporation (W.D. Tex). Served as the science advisor for the team that obtained a $2.3 billion final judgment for VLSI Technology in a suit against Intel. The matter involved two patents on technology used in Intel’s microprocessors.
  • Intel Corporation v. Future Link Systems LLC (D. Del.). Served as the science advisor for the team that obtained a settlement for Future Link Systems, resolving a patent dispute against Intel Corp. involving many hundreds of billions of dollars of microprocessors manufactured by Intel. In total, every one of Intel’s high-volume processors sold within the last eight years was accused of infringing multiple patents. Irell obtained favorable claim construction rulings, defeated two rounds of summary judgment motions and convinced the court to reject every one of Intel’s Daubert motions. With trial scheduled to begin in September, Intel had not managed to remove a single claim of a single patent from the case. In August 2017, after three years of litigation, Intel agreed to a confidential settlement.

  • MyMail, Inc. v. Conduit Ltd., Perion Network Ltd., et al. (E.D. Tex., PTAB). Served as the science advisor for the team that represented the defendants in patent litigation and related inter partes review involving patents related to browser toolbar technology. The case settled shortly before oral hearing in the inter partes review.

  • MyMail, Ltd. v. Yahoo!, Inc. (E.D. Tex.). Served as the science advisor for the team defending Yahoo! against patent infringement claims related to toolbar updating. The case settled in late 2017 on confidential terms.

Publications

  • Named Inventor, U.S. 8984184B2, “System and method for managing input/output data of peripheral devices” (2014)
  • “Microcontroller Programming for the Modern World,” Dissertation, Rice University, Houston, TX (2014)
  • “Medusa: Managing Concurrency and Communication in Embedded Systems,” In Proceedings of the 2014 USENIX conference on Annual Technical Conference (USENIX ATC’14), USENIX Association, Berkeley, CA (2014)
  • “Design and implementation of an embedded python run-time system,” In Proceedings of the 2012 USENIX conference on Annual Technical Conference (USENIX ATC’12), USENIX Association, Berkeley, CA, pp.27-27 (2012)
  • “SpecTLB: A Mechanism for Speculative Address Translation,” In Proceedings of the 37th Annual International Symposium on Computer Architecture (ISCA’11), ACM, New York, NY, pp.307-318 (2011)
  • “A Low-Cost Multi-Robot System for Research, Teaching, and Outreach,” In Proceedings of DARS 2010, a volume of Tracts in Advanced Robotics, Springer (2011)
  • “Translation Caching: Skip, Don’t Walk (the Page Table),” In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA ’10), ACM, New York, NY, pp.48-59 (2010)
  • “Grid-enabling orbital analysis and computationally intensive applications for a growing set of diversified users,” In Proceedings of the Network Operations and Management Symposium, pp.615-629 (April 2008)
  • “Owl: Microcontroller Development for the Modern World,” In USENIX;login:, pp.45-51 (February 2013)
  • “A MIPS R2000 Implementation,” In Proceedings of the 45th Annual Design Automation Conference (DAC ’08), ACM, New York, NY, pp.102-107 (2008)

Education

Rice University (Ph.D., Computer Science; M.S., Electrical and Computer Engineering)

Harvey Mudd College (B.S., Engineering and Music), with distinction, honors in Computer Science

Jump to Page
Close